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Design to Fab: Making it Work
Friday, March 30, 2012 | Mark Thompson, CID, Prototron Circuits

This month’s column will be just a little different. Normally, when I write about controlled impedances, I talk about the two most important points for fabrication relative to controlled impedance. But I rarely talk about controlled impedance at the design level through layout.

When a customer comes to us and asks us to do a preliminary impedance review relative to fabrication, we look for the design to be within 10%. We also look to make sure the traces they call out actually exist on the Gerber files. Many times, due to rounding errors, the drawing and Gerber files do not match.

Recently, a customer asked for a specific line size to be controlled and assumed the fabricator would prefer impedance callouts in whole numbers, so he rounded up – not realizing he had already used that draw size for features you would not control, such as ground fill and thermal ties.

After a phone call, we were able to get to the bottom of it all and discovered that the part had gone through many iterations and the latest line size was not properly represented on the drawing. New drawings were sent and the parts were made with no issues but this required some due diligence on our part. Many fabricators may have used the trace size they specified verbatim and called it good, and with large trace sizes they may get away with it on 50 ohm structures.

What is my point? Don’t be afraid to pick up the phone and ask the customer!

Another very large customer sent two 4-layer boards riddled with differential pairs and no information about any controlled impedances or specific dielectrics. When we asked if these were to be controlled, the customer was most appreciative and realized that some mention of the impedances, threshold and tolerance should have been made initially.

We see so much in the way of assumptions about Dk. Most use a SINGLE number for the entire stackup and call it out as such on a stackup template. Of course, the reality is that each sub-section, depending upon the dielectric distance and make-up, has its own effective Dk and this means modeling mismatches.

Another common issue relative to impedance is unintended co-planar coupling. Frequently, we are asked to do calculations and create a stackup based solely upon a drawing where we cannot see if any co-planar coupling is going on. Even when a customer sends PDFs of the layers, the actual G-sep distance cannot be derived from the PDFs. You will need to see the output Gerber data to accurately model the impedances if co-planar coupling exists.

Even the little things that you may not think impact impedance need to be known at the time of the calculations: things like color and type of mask material. Anything other than the standard green LPI usually is 1.5 to 2X the “normal” mask thickness. With small geometries (.1 mm and below) this extra mask could adversely affect the calculation.

We typically send customers (especially new customers) an impedance checklist asking about co-planar coupling, mask color, copper weights, the line sizes involved, and the threshold and tolerances associated with them.

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